Focus beyond quadratic speedups for error-corrected quantum advantage
Abstract
In this perspective, we discuss conditions under which it would be possible for a modest fault-tolerant quantum computer to realize a runtime advantage by executing a quantum algorithm with only a small polynomial speedup over the best classical alternative. The challenge is that the computation must finish within a reasonable amount of time while being difficult enough that the small quantum scaling advantage would compensate for the large constant factor overheads associated with error-correction. We compute several examples of such runtimes using state-of-the-art surface code constructions under a variety of assumptions. We conclude that quadratic speedups will not enable quantum advantage on early generations of such fault-tolerant devices unless there is a significant improvement in how we would realize quantum error-correction. While this conclusion persists even if we were to increase the rate of logical gates in the surface code by more than an order of magnitude, we also repeat this analysis for speedups by other polynomial degrees and find that quartic speedups look significantly more practical.
Introduction
One of the most important goals of the field of quantum computing is to eventually build a fault-tolerant quantum computer. But what valuable and classically challenging problems could we actually solve on such a device? Among the most compelling applications are quantum simulation Feynman (1982); Lloyd (1996) and prime factoring Shor (1994). Quantum algorithms for these tasks give exponential speedups over known classical alternatives but would have limited impact compared to significant improvements in our ability to address problems in broad areas of industrial relevance such as optimization and machine learning. However, while quantum algorithms exist for these applications, the most rigorous results have only been able to show a large speedup in contrived settings or a smaller speedup across a broad range of problems. For example, many quantum algorithms (often based on amplitude amplification Brassard et al. (2002)) give quadratic speedups for tasks such as search Grover (1996), optimization Grover (1996); Somma et al. (2008a); Campbell et al. (2019), Monte Carlo Brassard et al. (2002); Montanaro (2015); Rebentrost et al. (2018), various areas of machine learning Aïmeur et al. (2006); Wiebe et al. (2015) and more. However, attempts Sanders et al. (2020); Campbell et al. (2019) to assess the overheads of some such applications within fault-tolerance have come up with discouraging predictions for what would be required to achieve practical advantage against classical algorithms.


The central issue is that quantum error-correction and device operation time introduce significant constant factor slowdowns to the algorithm runtime (see Figure 1). These large overheads present many challenges for the practical realization of useful fault-tolerant devices. However, for applications that benefit from an exponential speedup relative to classical algorithms, the exponential scaling of the classical approach quickly catches up to the large constant factors of the quantum approach so that one can achieve a practical runtime advantage for even modest problem sizes. This is borne out through numerous studies on the cost of error-correcting applications with exponential scaling advantage in areas such as quantum chemistry Kivlichan et al. (2020); von Burg et al. (2020); Lee et al. (2020), quantum simulation of lattice models Lemieux et al. (2020a); Childs et al. (2018) and prime factoring Gidney and Ekerå (2019).
In this perspective we discuss when it would be practical for a modest fault-tolerant quantum computer to realize a quantum advantage with quantum algorithms giving only a small polynomial speedup over their classical competition. We will see that with only a low order (e.g., quadratic) speedup, exorbitantly long runtimes are sometimes required in order for the slightly worse scaling of the classical algorithm to catch up to the slightly better scaling (but worse constant factors) of the quantum algorithm. We will argue that the problem is especially pronounced when the best classical algorithms for a problem can also be easily parallelized.
Our analysis will emphasize current projections within the surface code Kitaev (2003) since it has the highest threshold error rate for a two-dimensional quantum computing architecture and is generally regarded as the most practical quantum error-correcting code Fowler et al. (2012). We will focus on a modest realization of the surface code that would involve enough resources to perform classically intractable calculations but only support a few state distillation factories. Our analysis differs from results analyzing the viability of error-correcting quadratic speedups for combinatorial optimization such as Campbell et al. (2019); Sanders et al. (2020), by addressing the prospects for achieving quantum advantage via polynomial speedup for a broad class of algorithms, rather than for specific problems. Note that Campbell et al. (2019) was the first study to detail poor prospects for error-correcting an algorithm achieving a quadratic speedup with a small fault-tolerant processor.
Here we will assume that there is some problem which can be solved by a classical computer that makes calls to a “classical primitive” circuit or by a quantum computer which makes calls to a “quantum primitive” circuit (which is often, but not always, related to the classical primitive circuit). This corresponds to an order polynomial quantum speedup in the number of queries to these subroutines. For , this is especially evocative of a common class of quantum algorithms leveraging amplitude amplification. This generously assumes no prefactor overhead in a quantum implementation of an algorithm with respect to the number of calls required and along with other crude assumptions, allows us to bound the crossover time.
Our back-of-the-envelope analysis makes many assumptions which are overly optimistic towards the quantum computer and yet we still conclude that the prospects look poor for quadratic speedups with current error-correcting codes and architectures to outperform classical computers in time-to-solution. It seems that to realize a quantum advantage with reasonable fault-tolerant resources, one must either focus beyond quadratic speedups, dramatically improve techniques for error-correction, or do both. Our conclusion is already “folk wisdom” among some in the small community that studies quantum algorithms and error-correction with an eye towards practical realization; however, this reality is not widely appreciated in the broader community that studies algorithms and applications of quantum computers more generally and there is value in presenting a specific argument to this effect in written form. An encouraging finding is that the prospects for error-corrected quantum advantage look significantly better with quartic speedups. Of course, there might exist use cases involving quadratic speedups that defy the framework of this analysis. Either way, we hope this perspective will encourage the field to critically examine the prospects for quantum advantage with error-corrected quadratic speedups and either produce examples where it is feasible, or focus more effort on algorithms with larger speedups.
Relationship between primitive times and runtime
Many quantum algorithms are built on coherent access to primitives implemented with classical logic. For example, this classical logic might be required to compute the value of a classical cost function for optimization Sanders et al. (2020), to evaluate a function of a trajectory of some security that one is pricing with Monte Carlo Rebentrost et al. (2018), or to compute some classical criteria that flags a marked state for which one might be searching Grover (1996). We will define the runtime of the quantum and classical algorithms as
(1) |
where gives the total runtime of the algorithm, is the number of primitive calls required, is the order of the polynomial speedup the quantum computer achieves and is the time required to perform a call. Throughout this perspective the subscripts and will denote “quantum” and “classical” implementations.
The condition for quantum advantage is
(2) |
We see then that whenever a problem will require enough calls that a quantum advantage is possible,
(3) |
where is the “breakeven time” which occurs when , corresponding to onset of quantum advantage. As emphasized in Figure 1, we will see that the fundamental challenge in realizing this runtime advantage against classical computers (for small ) is that in error-corrected contexts, making very large.
Rather than use a single CPU for the classical approach, one might instead parallelize the algorithm using classical CPUs. This will reduce the total classical runtime to
(4) |
where is the fraction of the algorithm which must be executed in serial and is the speedup factor due to parallelization consistent with the “Amdahl’s law” Amdahl (1967). Note that Amdahl’s law scaling is considered somewhat pessimistic as one can often adjust the size of problems to fully exploit the computing power that becomes available with more parallelism (e.g., see “Gustafson’s law” Gustafson (1988) for a more optimistic formula for ). But it also seems that in most situations where one might hope to find a quadratic speedup with a quantum computer (e.g. applications such as search, optimization, Monte Carlo, regression, etc.) the corresponding classical approach is embarrassingly parallel (suggesting that is small enough that for reasonable values of ). Regardless of the form of , classical parallelism leads to the following revised conditions for quantum advantage:
(5) |
While parallel efficiency might be limited for some applications, any implementation of an error-correcting code will also require substantial classical co-processing in order to perform decoding, and this is likely to require thousands of classical cores. Although many quantum algorithms can also benefit from various forms of parallelism, we are considering an early fault tolerance setting where there is likely an insufficient number of logical qubits to exploit a space-time tradeoff to the same extent.
Implementing error-corrected quantum primitives
We will now explain the principle overheads believed to be required for the best candidate for quantum error-correction on a two-dimensional lattice: the surface code. Toffolis are the most commonly used gate for implementing classical logic on a quantum computer but cannot be implemented transversally within practical implementations of the surface code. Instead, one must implement these gates by first distilling resource states. In particular, to implement a Toffoli gate one requires a CCZ state () and these states are consumed during the implementation of the gate. Distilling CCZ states requires a substantial amount of both time and hardware and thus, they are usually the bottleneck in realizing quantum algorithms within the surface code.
Here, we will focus on the state-of-the-art Toffoli factory constructions of Gidney and Fowler (2019a) which are based on applying the lattice surgery constructions of Fowler and Gidney (2018) to the fault-tolerant Toffoli protocols of Jones (2013); Eastin (2013). Using that approach one Toffoli gate requires surface code cycles, where is the code distance. The time per round of the surface code, including decoding time is expected to be around in superconducting qubits. Our analysis will assume a code distance in the vicinity of . This would be sufficient for an algorithm with billions of gates and physical gate error rates on the order of (as our analysis will reveal, even more than a billion gates would likely be required to obtain quantum advantage with a modest polynomial speedup). With these assumptions, our model predicts a Toffoli gate time of
(6) |
This rough approximation matches the more detailed resource estimate of Ref. Gidney and Fowler (2019a). We discuss these estimates in more detail in Appendix A.
Under the aforementioned assumptions which are specific to contemporary realizations of the surface code using superconducting qubits we could express the quantum primitive runtime as
(7) |
where is the number of Toffoli gates required to implement the quantum primitive. Although we have focused on superconducting qubits, we can also contextualize the performance of ion traps — another leading architecture for quantum advantage. Ion qubits enjoy hour-long coherence times Wang et al. (2017), but are typically gated by the performance of their two-qubit gate Bruzewicz et al. (2019). Gate times within a single ion crystal can range from hundreds of microseconds to sub-microsecond speeds Mølmer and Sørensen (1999); García-Ripoll et al. (2003); Wong-Campos et al. (2017); Schäfer et al. (2018); Torrontegui et al. (2020), and can be efficiently parallelized Grzesiak et al. (2020); Landsman et al. (2019).
Multiple ion crystals can be connected to form a networked quantum computer, either through a charge-coupled device Kielpinski et al. (2002); Pino et al. (2020) or via photonic interfaces Monroe et al. (2014); Hucul et al. (2015). While a charge-coupled device may support thousands of qubits, millions of qubits will likely require photonic interconnects, although large shuttling-based traps have been proposed Lekitsch et al. (2017). For either architecture, a cycle frequency has been identified as an ambitious but attainable goal Brown et al. (2016); Lekitsch et al. (2017); Nickerson et al. (2014). Consequently, we can roughly estimate that such a device will be limited by a clockspeed about slower than the decoding throughput limit, commensurate with typical high-fidelity two-qubit gate times Ballance et al. (2016); Gaebler et al. (2016) and corresponding to a . However, in trade, such a device may support the requisite connectivity for non-2D error-corrected codes and fault-tolerant gates. While the advantages of such approaches are speculative, we touch on some of these alternate proposals in Appendix B.
On a very large surface code quantum computer one could instead use multiple Toffoli factories (at a high cost in the number of physical qubits required) in order to reduce by performing state distillation in parallel. However, the Toffoli gates are only about two orders of magnitude slower than the Clifford gates and when using multiple factories one needs to account for routing overhead. Thus, while can be reduced at the cost of using many more qubits, only by a factor that is between about ten and one-hundred.
If is the number of qubits on which this problem is defined then a sensible lower bound would seem to be and thus, . For example, in Grover’s algorithm Grover (1996) one must perform a reflection that requires Toffoli gates. In order to achieve a quantum advantage we would need to focus on problem sizes that are sufficiently large that enough calls can be made so that Eq. (2) is satisfied. We find it difficult to imagine satisfying this condition for problem sizes less than one-hundred qubits. Thus, an approximate “lower bound” (using ) would be
(8) |
In addition to this lower bound, we will also consider a specific, realistic example to keep our estimates grounded. We will focus on the quantum accelerated simulated annealing by qubitized quantum walk algorithm studied in Somma et al. (2008b); Lemieux et al. (2020b), which appears to provide a quadratic speedup over classical simulated annealing (at least in terms of the best known bounds) in terms of the mixing time of the Markov chain under certain assumptions Boixo et al. (2009). This is among the most efficient algorithms compiled in Sanders et al. (2020) and for the Sherrington-Kirkpatrick model Kirkpatrick et al. (1983), the implementation complexity is (neglecting some subdominant scalings that depend on precision), which is only worse than the scaling of our lower bound by a factor of five. For example, for an qubit instance, the work of Sanders et al. (2020) shows that only about Toffoli gates are required to make an update. Thus, for that problem size (which we choose to facilitate a comparison to classical algorithms that we will discuss later) we have that
(9) |
Implementing classical primitives
Classical computers are very fast; a typical 3 GHz CPU can perform several billion 64 bit operations (e.g., floating point multiplications) per second. We might crudely write that the classical primitive time is where is the number of classical clock cycles required to implement the classical primitive. For our first example comparison of quantum and classical primitives we will assume that any classical logic operation that would require one Toffoli in the quantum primitive can be executed during one classical clock cycle in the classical primitive. This seems generous to the quantum computer since many operations that would take a single clock cycle on a classical computer would actually require thousands of Toffolis. (Note that we are not assuming any scaling advantage for the quantum computer in the primitive implementations.) One might worry about memory-bound classical primitives (since calls to main memory can take hundreds of clock cycles) but since problems defined on more than thousands of logical bits would be infeasible to process on a small fault-tolerant quantum computer we expect that the memory required for the corresponding classical primitives can be held in cache.
Thus, a corresponding bound on the time to realize a classical primitive for a problem where a quantum computer could realize a quantum primitive with anywhere near the lower bound time given in the prior section () is , and for ,
(10) |
Even though the equivalence we make between Toffolis and classical compute cycles is seemingly generous to the quantum computer, the assumption of such a cheap primitive on the quantum side (only 100 Toffolis) results in what appears to be a fairly cheap primitive on the classical side. However, because Eq. (5) scales worse with than with , this assumption is ultimately optimistic towards the overall crossover time.
Consistent with the prior section, we will also discuss the classical primitive time required to apply simulated annealing to an instance of the Sherrington-Kirkpatrick model. Using the techniques developed in Isakov et al. (2015), a performant implementation of classical simulated annealing code for an instance of the Sherrington-Kirkpatrick model can perform a simulated annealing step in roughly 7 CPU-nanoseconds Sanders et al. (2020) (this accounts for the fact that most updates for the Sherrington-Kirkpatrick model are rejected); thus in that case,
(11) |
But given the high costs of quantum computing it is unclear that we should compare to a single classical core.
Minimum runtime for quadratic quantum advantage
Here we discuss the ramifications that the primitive runtimes discussed in the prior two sections have for the minimum time to achieve advantage according to Eq. (3) in the case of a quadratic quantum speedup. First, we will compare the example of a quantum primitive requiring only Toffolis and . We argued that any such primitive could likely be computed in on a single core. For this example, . One might object to this minimal example on the grounds that it seems unlikely any interesting primitive would require only 100 Toffolis. While this is true, we point out that because quantum runtime is quadratic in the quantum primitive time and only inversely proportional to the classical primitive time, the overall crossover time can only get worse by assuming that more than 100 Toffolis would be required.
Next, we will compare to the example of quantum accelerated simulated annealing. We focus on this example because the steps of the quantum algorithm have been concretely compiled, appear quite efficient, and have a clear classical analogue. Here, for an qubit instance we have that , reproducing the finding in Sanders et al. (2020). We note that quantum advantage in this case would occur when . This means that calls would need to be required for the classical algorithm. However, most Sherrington-Kirkpatrick model instances would require many fewer calls to solve with classical simulated annealing and so one would need to focus on an even bigger system for which the numbers will look yet worse for the quantum computer. Notice that our simulated annealing example gave a quantum runtime that is much longer than the resources required for the quantum primitive with Toffolis. This is because the notion that it would take a classical computer an entire clock cycle to do what a quantum computer could accomplish with a single Toffoli is very generous to the quantum computer.
At first glance, the quantum runtime of 2.4 hours to achieve advantage for the primitive with just 100 Toffolis seems encouraging. Unfortunately, this was just for a single classical core. Even most laptops have on the order of ten cores these days and again, most of the problems where quantum computers display a quadratic advantage are classically embarrassingly parallel problems. Furthermore, error-corrected quantum computers are likely to use thousands of classical CPUs just for decoding. When using different classical CPUs in parallel then the breakeven time is given by Eq. (5). Using that equation, if we take CPUs for the classical task (rather than using them for error-correction), and if the classical algorithm is sufficiently parallelizable ( so ), we see that the breakeven time even in this still quantum-generous example becomes one year. As we discuss in the next section there are also ways of parallelizing the quantum computations; e.g., by using multiple quantum computers or distillation factories.
polynomial degree | parallelism | resource “lower bound” | simulated annealing | ||
---|---|---|---|---|---|
speedup | iterations | runtime | iterations | runtime | |
Quadratic, | 1 | ||||
Cubic, | 1 | ||||
Quartic, | 1 | ||||
The viability of higher polynomial speedups
and the impact of faster error-correction
We report values of both and assuming quantum speedups by different polynomial degrees under different amounts of classical parallelism in Table 1. While the viability of quantum advantage with cubic speedups is still a bit ambiguous, the prospects of achieving quantum advantage given a quartic speedup are promising. Even the simulated annealing example run with a classical adversary with parallelism would give quantum advantage after five hours of runtime if we assume a quartic speedup (while we do not expect a quartic speedup in that case, the comparison is still instructive).
It is rather surprising just how much of a difference there is for this example between assuming a quadratic speedup (requiring 880 millennia of runtime for advantage) and a quartic speedup (requiring just 4.9 hours of runtime for advantage). There are not as many examples of quartic speedups in quantum computing but there are a few, such as the tensor principle component analysis algorithm of Hastings Hastings (2020). Another example is the quartic query complexity reductions of Ambainis et al. Ambainis et al. (2015) and Aaronson et al. Aaronson et al. (2020). We also expect that certain applications of quantum algorithms for linear systems Harrow et al. (2009) (such as for solving linear differential equations in high dimension Berry (2014)) might lead to modest polynomial speedups higher than quadratic. It is also possible that some heuristic quantum algorithms for optimization might give larger than quadratic improvements for some class of problems, although this is still speculative.
Another question we might ask is, what happens if we were somehow able to implement Toffoli gates much faster in the surface code? For example, we might achieve this by fanning out and using more physical qubits per factory, more Toffoli factories, by inventing significantly more efficient protocols for Toffoli state distillation, or even by switching to a different technology with an intrinsically faster cycle time. We will perform this analysis for the case of quadratic speedups; there, the quantum runtime is reduced to where is a speedup factor corresponding to performing Toffoli distillation in time . In analogy to Eq. (5) this leads to the equations for a quadratic quantum speedup
(12) |
In Table 2 we compute Eq. (12) for our example problems with , and , assuming a classical adversary capable of achieving an parallelism. We restrict ourselves to due to the general difficulty in achieving high parallel efficiency described by Amdahl’s law. However, note that for simulated annealing we can achieve in practice (and so these numbers are overly optimistic for that case).
speedup | resource “lower bound” | simulated annealing | ||
---|---|---|---|---|
factor | iterations | runtime | iterations | runtime |
Unfortunately, even if Toffoli distillation rates improve by an order of magnitude it would not be enough to make quantum advantage with a quadratic speedup viable. If Toffoli distillation rates improve by two orders magnitude (making them essentially as cheap as Clifford gates) then it would still be challenging to obtain quantum advantage with a quadratic speedup (it would take more than a month for the simulated annealing example despite limiting the classical parallelism to ) but we cannot categorically rule it out for all algorithms. At three orders of magnitude speedup the story would be materially different but this would likely require a significant breakthrough. Even if classical processing and signal propagation were instantaneous, and we could adapt measurements to take advantage feedforward single-qubit gates only being applied half the time, a single layer of non-Clifford gates would still take a hard limit of the measurement time plus half the single qubit gate time.
Conclusion
We have investigated simple conditions that must be satisfied to realize a quantum advantage through polynomial speedups on a small fault-tolerant quantum computer. Our ultimate finding is that the prospects are generally poor for a quadratic speedup, consistent with folk knowledge in the error-correction community and recent work such as Sanders et al. (2020); Campbell et al. (2019). The comparison to parallel classical resources is particularly damning for quantum computing and unfortunately, many quadratic quantum speedups (especially those leveraging amplitude amplification) apply to problems that are highly parallelizeable. The strongest conclusions in this work assume that one can achieve classical parallelism speedups on the order of or more. But if one can produce a quadratic speedup for a problem where that is not the case, the prospects of quantum advantage would be improved.
These findings do not apply to all polynomial speedups. We found that while one would need to very significantly improve the rate of an error-corrected processor to help the case of quadratic speedups, having a quartic speedup rather than a quadratic speedup is often sufficient to restore the viability of achieving quantum advantage on a modest processor. Thus, we believe that these results suggest that the field should focus beyond quadratic speedups to find viable applications that might produce a quantum advantage on the first several generations of fault-tolerant quantum computers.
We expect this conclusion will persist under a variety of different cost models (e.g., were we to focus on the energy consumption of a computation rather than the runtime). However, we also expect that the community will make progress on some of the challenges described here, or perhaps identify circumstances under which the assumptions of this analysis do not apply. Either way, we hope that these arguments will foster further discussion about how we might develop broadly applicable algorithms that can achieve quantum advantage on small error-corrected quantum computers.
Acknowledgments
The authors thank Dave Bacon, Dominic Berry, Ken Brown, Eddie Farhi, Austin Fowler, Bill Huggins, Sergei Isakov, Evan Jeffrey, Cody Jones, John Platt, Rolando Somma, Nathan Wiebe and Will Zeng for helpful discussions and feedback on earlier drafts.
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Appendix A Accounting for error-correction costs
In the main text, we provide an estimate for the time that it takes to perform a single Toffoli gate with optimized factories within the surface code. The crux of the argument in the main text, is that this time is so much slower than the classical equivalent, there is a massive overhead which must be first overcome. We believe that it is valuable in directing future research in error-correction and algorithms to break down the origin of this overhead into its contributions from quantum error-correction and the physical device speed itself. Here we do so in some detail for the case of the surface code in superconducting qubits, and in passing for ion traps. We hope that this discussion will elucidate several avenues through which breakthroughs in error-correction might materially change the analysis of the main text.
To begin, we will assume that there is a physical two-qubit operation and syndrome measurement speed, and , where as is used to build measurement circuits along with a base physical measurement time . Modern fault-tolerant error-correction proceeds via rounds of syndrome extraction, processing, and correction in order to implement gates. The core physical operation of these rounds on the device is measurement of syndromes, and we are hence lower bounded by the measurement time in realistic settings. For context, estimates of these times for high fidelity superconducting qubits that would be realistic upon improvement are roughly and .
For a networked ion trap device, there are extra nuances in estimating a realistic syndrome measurement speed Trout et al. (2018). Currently, high-fidelity two-qubit gates and measurements take approximately and Ballance et al. (2016); Crain et al. (2019), although high-fidelity microsecond gates have also been demonstrated Schäfer et al. (2018). Most proposals are limited by a typical trap frequency of , although this limit is not fundamental Wong-Campos et al. (2017) and submicrosecond gate times are possible García-Ripoll et al. (2003).
In addition, communicating between different crystals will likely introduce significant overhead. When using photonic interconnects, the mean connection rate between different modules will be fundamentally limited by the emission rate, which for typical atomic transitions into free space will be . However, current state-of-the-art entanglement generation occurs in the regime Stephenson et al. (2020). When accounting for fractional light collection and single-photon detector efficiency, we can ambitiously estimate future mean connection rates of Brown et al. (2016); Hucul et al. (2015), which may be amplified by generating entanglement in parallel at an additional cost in space. Without photonic interconnects, shuttling and cooling will introduce additional slowdowns Kielpinski et al. (2002), and can currently take hundreds of microseconds Pino et al. (2020). With photonic interconnects, shuttling may still be required to isolate memory ions from light scattered during entanglement generation, although this can be mitigated by using a different atomic species for communication Tan et al. (2015); Ballance et al. (2015); Negnevitsky et al. (2018).
None of these components are fundamentally limited below . However, many of them must act several times in concert to measure a single round of syndromes. Consequently, seems an ambitious goal, and is commensurate with earlier estimates Brown et al. (2016); Lekitsch et al. (2017); Nickerson et al. (2014).
If one had perfect operations, but still performed gates via a synthesized and fault-tolerant protocol, these would lower-bound the achievable runtime for a gate. As our operations are not perfect, however, we will need to encode in an error-correcting code with some distance which is chosen based on the error rate in our device, threshold of the code, and total number of operations we expect to perform. If one is allowed to use numerous ancilla qubits, this need not expand the runtime of individual operations by exploiting parallelism through teleportation and spacetime optimization Fowler (2012); Gidney and Fowler (2019b). However, more qubit spartan implementations must use rounds of measurement and correction to protect against measurement errors in the time direction, adding a factor of in the time cost. Research into one-shot correction techniques hopes to alleviate this time dependence on without excessive space overhead Delfosse et al. (2020), but current code constructions are not readily implementable.
On top of each round of these measurements, we must account for the time for this information to leave the device, be processed via decoding, and in some cases, implement active recovery after a gate, where this time depends on the hardware and complexity of the decoding. In order for error-correction to be efficient, it must be possible to process the syndrome data without an accumulation of rounds that grows in time. If we denote this processing latency as , then the time for processing rounds is lower bounded approximately by the time it takes to produce those syndrome measurements on the physical device plus this latency, or . Note that depending on the implementation details, is likely to depend on , but with sufficient classical parallelization it may be possible to make it effectively independent.
On top of these costs, each gate has some associated prefactor in number of rounds that depends on the type of gate and its logical locality, . For easy, or Clifford, gates in most codes, can be made near . Unfortunately, in order to perform universal computation, one requires a gate which is not easy to implement Eastin and Knill (2009), and common proposals center around state distillation where the prefactor is often on the order of . Moreover, if one considers synthesis of arbitrary rotations into multiple of these hard gates, can multiply by a factor of or more depending on the precision, leaving on the order of . Putting these together, we can approximate a lower bound on the quantum gate time scaling in terms of error-correction parameters as
(13) |
Now that we have a general picture of how the time overhead enters for quantum error-correction, we examine it in a specific gate and context. In particular, we focus on superconducting qubits with feasible error rates and operation times within the surface code. Toffoli gates are required to implement classical logic on a quantum computer but cannot be implemented transversally within practical implementations of the surface code. Instead, one must implement these gates by first distilling resource states. To implement a Toffoli gate one requires a CCZ state () and these states are consumed during the implementation of the gate. Distilling CCZ states requires a substantial amount of both time and hardware and thus, they are usually the bottleneck in realizing quantum algorithms within the surface code.
Here, we will focus on the state-of-the-art Toffoli factory constructions of Gidney and Fowler (2019a) which are based on applying the lattice surgery constructions of Fowler and Gidney (2018) to the fault-tolerant Toffoli protocols of Jones (2013); Eastin (2013). Using that approach one can distill one CCZ state using two levels of state distillation with surface code cycles and a factory with a data qubit footprint of about where is the code distance (the total footprint includes measurement qubits as well, and is thus roughly double this number). Hence for the Toffoli gate, we take .
We will assume a correlated-error minimum weight perfect matching decoder capable of keeping pace with 1 s rounds of surface code error detection Fowler (2013), and capable of performing with a similar latency of feedforward in about 1 s for around 30, and conservatively lower bound the overall time for rounds to then be . We will also assume physical gate error rates in the vicinity of , which we hope will be achievable at scale in the next decade. Since we expect to require on the order of billions of Toffoli gates to achieve quantum advantage for practical applications (we will see this is actually a significant underestimate for the case of quadratic speedups) we will assume that a code distance in the vicinity of will be sufficient (since errors are suppressed exponentially in code distance this number will be approximately correct).
With these assumptions, our model predicts a Toffoli gate time of s. This rough approximation matches the more detailed resource estimate which shows the spacetime volume required to implement one Toffoli gate is approximately 23 qubit seconds Gidney and Fowler (2019a). We discuss the resources required for distillation in terms of qubitseconds because it is generally possible to make tradeoffs between space and time but the critical resource to minimize is actually the product of the two. Under these assumptions we would be able to distill a Toffoli gate in about 170 using around 130,000 physical qubits (see the resource estimation spreadsheet in Gidney and Fowler (2019a) for detailed assumptions). Due to this large overhead we focus on estimates assuming we distill CCZ states in series, which is likely how we would operate early fault-tolerant surface code computers. For comparison, if ion trap devices used a similar surface code implementation and error rates while achieving a syndrome measurement time of in parallel, the gate time assuming is , or roughly a factor of 100 slower.
To make this more concrete, we can convert this to a unitless error-correction overhead for a particular gate of . If we keep the overall bound for , and make a reasonable estimate for the improvement of physical syndrome measurement times for superconducting qubits to , then the error-correction overhead at this distance is .
This suggests that at present for superconducting qubits, the most fruitful improvements with regards to algorithmic speed are the reduction of decoding time, the minimization of time overheads in distillation factories, and then the reduction of number of measurement rounds required to protect in the time direction, perhaps through improved gate fidelities for equivalent operation times to result in lower required distances or through single shot protocols. If this can be achieved, the next milestones would be the reduction of physical syndrome extraction time. However, even such advances would already make prospects for realizing a quantum advantage with quadratic speedups considerably more enticing.
Appendix B Alternative approaches
Throughout this work, we have focused on the time cost of surface code implementations of non-Clifford gates, as the expense of such gates has been highly optimized given the connectivity constraints of a superconducting quantum device. Furthermore, the surface code is one of the few error-correction schemes that can operate efficiently in the high noise regime, with gate infidelities in the range of Raussendorf and Harrington (2007); Fowler et al. (2012).
However, there are limitations when considering a two-dimensional architecture. We have chosen to report on the time-cost of logical gates (while keeping the space cost low). By this metric, transversal gates are minimally expensive, yet non-Clifford gates cannot be implemented transversally in the surface code. In fact, any constant depth circuit on a 2D-local stabilizer code must be Clifford Bravyi and König (2013), often leading to a time-dependence on . Additional connectivity in the device — and likely a requirement of lower error rates — opens up many more avenues towards universal fault-tolerant logic. Beyond magic state distillation, contemporary approaches include, but are not limited to:
For non-Clifford gates, there are tradeoffs that can be made to mitigate the distance and routing overhead of our bound at the expense of many more qubits. Whether or not these constructions may yield a lower space and time overhead at reasonable error rates is speculative. Numerical studies of alternative schemes have yet to show a convincing advantage Chamberland et al. (2017); Beverland et al. , and often require error rates to operate efficiently, although their spacetime footprint can be smaller Brown (2020). Nonetheless, significant optimizations or new approaches are likely needed to recoup a reasonable-sized quadratic quantum advantage.
A separate avenue towards reducing the space overhead of error-correction are block encodings. While surface codes are robust, they require very many qubits per logical qubit. More generally, 2D-local code families are fundamentally restricted to have a vanishing ratio of logical qubits to physical qubits, assuming an underlying growing code distance Bravyi et al. (2010); Bravyi (2011). In an all-to-all connected device, a non-vanishing rate is possible without sacrificing the low stabilizer weight often essential for good performance Tillich and Zémor (2013). In particular, there have been promising numerical studies of high-density memories in idealized noise settings using variations on efficient belief propagation decoding Panteleev and Kalachev (2019); Grospellier et al. (2020).
For the purposes of our bound, we have assumed first generation fault-tolerant devices will support hundreds of logical qubits each with a distance of , and few distillation factories. The total qubit footprint of such a device will remain in the qubit range. By comparison, there exist intermediate-size families of block codes that can encode hundreds of logical qubits using only qubits. However, it is difficult to predict the consequences of using such encodings in the context of our computation-time bound. The required physical error rates may be untenably low, with relatively few studies predicting performance in circuit-level error models Higgott and Breuckmann (2020). In addition, performing gates efficiently on such codes is a difficult task Gottesman (2013); Krishna and Poulin (2019). As such, while a significant reduction in memory space may result, the role of such codes in future fault-tolerant devices remains unclear.