Enhancing Virtual Distillation with Circuit Cutting for Quantum Error Mitigation

This section reviews the theory of Virtual Distillation, and the notation used is based on Ref. [9, 18]. When the state preparation process is affected by incoherent noise, the desired pure quantum state, represented as $\left|\psi\right\rangle\left\langle\psi\right|$, can be distorted into a mixed state, described by the density matrix:

In Equation (1), $\lambda_{k}$ represents the probability of the system in the state $\left|\psi_{k}\right\rangle$, where $\lambda_{k}\leq 1$ and $\sum_{k}\lambda_{k}=1$. For simplicity, we assume that the first state $\left|\psi_{1}\right\rangle\left\langle\psi_{1}\right|$ in the mixture is the dominant eigenstate, with $\lambda_{1}$ being the dominant eigenvalue.

To mitigate the effects of noise and restore the purity of the state, the mixed state $\rho$ can be exponentiated $M$ times, normalizing $\rho^{M}$ yields:

The mitigated expectation value, denoted as $\langle O\rangle_{\text{mitigated}}$, is obtained by evaluating the trace of the observable $O$ with the state $\rho^{M}/\operatorname{Tr}\left(\rho^{M}\right)$:

By computing $\langle O\rangle_{\text{mitigated}}$, virtual distillation approximates the expectation value with respect to the dominant eigenstate $\left|\psi_{1}\right\rangle\left\langle\psi_{1}\right|$. Although the dominant eigenstate $\left|\psi_{1}\right\rangle\left\langle\psi_{1}\right|$ is not necessarily the desired state $\left|\psi\right\rangle\left\langle\psi\right|$, theoretical analysis [11] shows the mismatch between these two states is exponentially smaller than the build-up of the other erroneous states $\left|\psi_{k}\right\rangle\left\langle\psi_{k}\right|_{k\neq 1}$. This approach enables the mitigation of errors and provides an enhanced estimation of quantum observables.

To estimate the expectation value of the state $\rho^{M}/\operatorname{Tr}\left(\rho^{M}\right)$, Ref. [9] utilize the following equation:

Here, $O^{\mathbf{i}}$ represents the observable $O$ acting on an arbitrary subsystem $i$, while $S^{(M)}$ denotes the cyclic shift operator applied to $M$ systems.

This equation provides an expression for estimating the desired expectation value by relating it to the trace of the observable $O^{\mathbf{i}}S^{(M)}\rho^{\otimes M}$ and the trace of $S^{(M)}\rho^{\otimes M}$. To estimate these two traces, it is necessary to prepare $M$ copies of the state $\rho$. For practical implementation on near-term quantum devices, we will focus on the case of preparing two copies of the state.

The circuit implementation involves two main steps. First, $M$ copies of the state $\rho$ need to be prepared. In the context of preparing two copies, it is represented as $\rho^{\otimes 2}$. The second step is to measure the expectation value of $\rho^{\otimes 2}$ with respect to the observables $S^{(M)}$ and $O^{\mathbf{i}}S^{(M)}$. Reference [9] discusses two methods for measuring these observables. One approach involves the introduction of ancilla qubits, where the ancilla qubits are prepared in the state $|+\rangle=(|0\rangle+|1\rangle)/\sqrt{2}$ and a sequence of controlled-SWAP gates are applied to “bridge” the $M$ copies of $\rho$. Alternatively, another approach eliminates the requirement for ancilla qubits. This method relies on diagonalizing gates designed to diagonalize the observables $S^{(M)}$ and $O^{\mathbf{i}}S^{(M)}$. These diagonalizing gates “bridge” the $M$ copies of $\rho$ and allow measurement of these observables in the computational basis. We can then estimate the expectation values based on the measurement outcomes. The virtual distillation circuit with diagonalizing gate implementation is shown in Fig. 1.

In practical scenarios, the execution of controlled-SWAP gates on near-term quantum devices often introduces substantial noise, rendering the implementation of virtual distillation using ancilla qubits impractical. As a result, the remainder of this paper focuses on the virtual distillation implementation by utilizing diagonalizing gates.

According to the findings in Ref. [9], the implementation of the virtual distillation circuit requires only a single additional layer of diagonalizing gates. Consequently, the number of extra gates needed for virtual distillation exhibits a linear growth relative to the number of qubits in the circuit. Furthermore, Ref. [10] suggests that the preparation of the quantum state $\left|\psi\right\rangle$ typically necessitates $\mathcal{O}[a(N)N]$ gates, where $a(N)$ represents the computation depth. However, in scenarios where the computational problems extend beyond a constant-depth circuit, the gate count in the primary computation increases at a faster rate than $\mathcal{O}(N)$. Consequently, as the computation is scaled up, the additional gate count required for constructing the virtual distillation circuit becomes relatively less significant.

Nevertheless, it is crucial to acknowledge that the aforementioned study does not take into account the inherent connectivity limitations of near-term quantum devices. The qubits in the superconducting quantum computers [3, 7] and the neutral atom array quantum computers [15] are not fully connected. While the existing trapped-ion devices featuring tens of qubits offer full connectivity, the challenge lies in designing a scalable QCCD (Quantum Charge-Coupled Device) architecture [13] that comprises thousands of qubits. Such an architecture would consist of multiple fully-connected clusters; however, the inter-connection across these clusters remains limited. The connectivity limitation in the quantum devices requires the insertion of additional SWAP gates before applying the diagonalizing gates. Fig. 1 shows an example of mapping a 6-qubit virtual distillation circuit to a physical device with linear connectivity. Three SWAP gates are inserted for qubit routing. In the worst-case scenario, each diagonalizing gate requires at most $N-1$ SWAP gates to move the two logical qubits to adjacent physical qubits. Therefore, the upper bound of the number of extra gates introduced by virtual distillation is $\mathcal{O}(N^{2})$. As the circuit size grows, the number of these additional gates increases at a rate faster than linear, resulting in a substantial overhead.

In order to assess the impact of these additional SWAP gates in the virtual distillation circuit, we employed a RealAmplitudes circuit from Qiskit library [20]. The RealAmplitudes circuit is commonly utilized as an ansatz circuit in chemistry applications and consists of alternating layers of rotation-Y gates and CNOT gates. An example of the RealAmplitudes circuit can be seen in Fig. 2.

In our study, we utilized the RealAmplitudes circuit as the original circuit for state preparation, varying the number of qubits and layers. Subsequently, we applied the virtual distillation approach to examine the impact of additional SWAP gates on circuit size. To evaluate the overhead associated with applying virtual distillation on a near-term device, we transpiled both the original circuits and the circuits after applying the virtual distillation approach. The transpilation process utilized a coupling map derived from the 127-qubit IBM machine, named ibm_sherbrooke. This machine adopts a heavy hex lattice topology commonly used in IBM quantum machines. The optimization level is set to 3 to minimize the number of additional inserted SWAP operations. The resulting CNOT gate counts after transpilation are presented in Fig. 3b. For comparison purposes, we also included the circuit translation results using a fully connected coupling map in Fig. 3a.

We systematically increased both the number of qubits (ranging from 10 to 50) and the alternating layers of rotation-Y gates and CNOT gates (ranging from 10 to 50) to modify the gate complexity of the original circuit. Figure 3a illustrates the ideal scenario with a fully connected coupling map, where the additional gate count required for constructing a virtual distillation circuit grows linearly with respect to the number of qubits, resulting in a relatively smaller overhead compared to the increase in gate count of the original circuit. However, by visualizing the changes in circuit size on a limited connected coupling map from the real quantum device through Fig. 3b, it becomes evident that as the circuit scales up, the number of additional gates required for constructing the virtual distillation circuit remains substantial, introducing significant overhead. This observation highlights the fact that running the virtual distillation circuit on a limited connectivity device significantly increases circuit complexity, thereby undermining the effectiveness of the virtual distillation approach. In light of this, we propose a solution for enabling the application of the virtual distillation approach on near-term quantum devices by employing circuit-cutting techniques to reduce gate complexity significantly.

This section provides a basic overview of Quantum Circuit Cutting [5, 12, 17]. In Ref. [12], it was shown that an arbitrary quantum state represented by a density matrix $\rho$, can be decomposed as:

Here, $\mathcal{B}$ represents the basis of self-adjoint $2\times 2$ matrices, where for convenience, we can select $\mathcal{B}\equiv\{X,Y,Z,I\}$ as the basis. The symbol $\operatorname{tr}_{n}$ denotes a partial trace operation with respect to qubit $n$, while $M_{n}$ denotes the action of the operator $M$ on qubit $n$, with the operator $I$ acting on the remaining qubits.

Each term in the equation (5) can be divided into two components. The first component, $\operatorname{tr}_{n}\left(M_{n}\rho\right)$, corresponds to the measurement of the observable $M_{n}$ while the system is in the state $\rho$. This portion of the circuit can be referred to as subcircuit $j$. The second component involves the initialization or preparation of the eigenstates of $M$. This segment can be denoted as subcircuit $k$. By following this approach, the equation demonstrates how a quantum state can be reconstructed after a cut is made on one of its qubits, as illustrated in Fig. 4. This technique forms the core of quantum circuit cutting.

As shown in Fig. 4, cutting one wire results in three copies of the subcircuit $j$ and four copies of the subcircuit $k$. It is important to highlight that the total number of copies exhibits exponential growth as the number of cuts made to a circuit increases. Therefore, an efficient scheme with circuit-cutting needs to find good cutting points that limit the total number of cuts in the circuit. While identifying suitable cutting points in general poses challenges, the inherent structure of the virtual distillation circuit facilitates the identification of good cutting points.

As discussed in Section II-C, implementing virtual distillation circuits on real devices has two challenges: 1) Additional SWAP gates are inserted before applying the diagonalizing gates. 2) Both the inserted SWAP gates and the diagonalizing gates are subject to noise and may hinder the virtual distillation result.

These two challenges can be effectively addressed by cutting the virtual distillation circuit into fragments of the diagonalizing gates and fragments of the original circuit that prepares the noisy quantum state. First, by independently executing these smaller fragments, the requirement for inserting SWAP operations is significantly reduced. Second, since the size of each diagonalizing gate does not increase with the number of qubits in the original circuit, we can efficiently simulate the diagonalizing gates on a noise-free classical simulator. This simulation aids in mitigating the noise introduced by the diagonalizing gates and enhances the overall performance. Liu et al. introduced the Simulated Quantum Error Mitigation (SQEM) framework [16] where they leveraged circuit cutting to simulate the Pauli Check Sandwiching circuit [19] for quantum error mitigation.

Ideally, our objective is to cut out all the diagonalizing gates simultaneously; however, the number of subcircuit copies grows exponentially with the number of cuts. To overcome this limitation, we leverage the fact that diagonalizing gates are only applied pairwise and propose a pairwise circuit cutting scheme. The proposed scheme is demonstrated in Fig. 5. The original circuit for generating the noisy quantum state is an n-qubit circuit and we prepare two copies of the noisy state in the virtual distillation circuit.

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  First, the virtual distillation circuit is executed on a physical device to acquire the unmitigated noisy output distribution $P_{um}(q_{0}q_{0}^{\prime}q_{1}q_{1}^{\prime}...q_{n-1}q_{n-1}^{\prime})$.

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  Then, we will replicate the virtual distillation circuit n times to obtain n mitigated pairwise distributions $P(q_{0}q_{0}),...,P(q_{n-1}q_{n-1}^{\prime})$. Since the goal is to obtain pairwise distribution, each replica only consists of gates that have dependency with the measurement, i.e., two identical subcircuits of the original circuit and a diagonalizing gate. The diagonalizing gate is cut out and simulated on a noise-free simulator, while the rest of the circuit is executed on a physical device.

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  Lastly, to obtain the final mitigated result, we need to update the unmitigated noisy output distribution $P_{um}(q_{0}q_{0}^{\prime}q_{1}q_{1}^{\prime}...q_{n-1}q_{n-1}^{\prime})$ with mitigated pairwise distributions $P(q_{0}q_{0}),...,P(q_{n-1}q_{n-1}^{\prime})$. We utilize the recombination method described in [16] to merge these results and produce the overall mitigated output.

To optimize the circuit and reduce noise, we utilize the following optimizations in the scheme. Firstly, when executing the part on the classical simulator, we can reuse the results of the diagonalizing gate if the separated diagonalizing gates have the same matrix. This approach saves computation time and resources. Secondly, for the part executed on the quantum device, we eliminate any gates that are not predecessors of the separated diagonalizing gate. This pruning process results in a more compact and less noisy circuit that is customized for the specific quantum device. As shown in Fig. 5, the transparent gates in the diagram are the ones that have no dependency on the diagonalizing gates and can be eliminated.

The application of the quantum circuit cutting technique in virtual distillation offers several notable advantages. These advantages contribute to enhancing the performance and effectiveness of the virtual distillation circuit.

First, by dividing the virtual distillation circuit into multiple parallel steps, we enable efficient execution of the circuit. This parallelization allows us to take advantage of the available computational resources and accelerate the overall processing time. Furthermore, by reusing the results of the diagonalizing gate on the classical simulator, we reduce the computational overhead associated with redundant calculations. Additionally, by removing irrelevant gates that are not predecessors of the separated diagonalizing gate, we eliminate unnecessary operations, resulting in a more concise and streamlined circuit. This pruning process mitigates the impact of noise and significantly improves the quality of the mitigated pairwise distributions $P(q_{0}q_{0}),...,P(q_{n-1}q_{n-1}^{\prime})$. Also, by eliminating non-essential gates, we create a circuit that is optimized for the connectivity and operational constraints of the quantum device. This customization improves the circuit’s compatibility with the device, increasing the likelihood of successful execution and achieving desired results.

To obtain the final mitigated output, the outcomes from each step, which correspond to individual pairs of qubits in the circuit, need to be combined. The recombination method described in [16] provides an effective approach for merging these results. By leveraging classical post-processing techniques, we can integrate the outcomes from each step and generate the overall mitigated output.

In summary, applying the quantum circuit cutting technique in virtual distillation brings several advantages, including efficient parallel execution, noise reduction, and accurate outcome recombination. These advantages contribute to improving the performance, reliability, and scalability of virtual distillation, making it a promising approach for near-term quantum devices.

The proposed scheme is scalable with respect to the number of qubits $N$ in the original circuit. The total time is directly proportional to the number of runs performed on the physical device. As we replicate the virtual distillation circuit $N$ times and the circuit cutting results in three copies for each replica, the total number of hardware runs is $\mathcal{O}(3N)$. The runtime can be reduced since the hardware execution of these copies can be parallelized.

Regarding the computational complexity associated with simulating diagonalizing gates, the size of the diagonalizing gate is determined by the number of copies $M$ in the virtual distillation setup. Since a large value of $M$ significantly increases the size of the virtual distillation circuit, it is common practice to set $M$ to 2, and the diagonalizing gates become two-qubit gates. Consequently, the classical simulation complexity is bounded by a constant value $\mathcal{O}(C)$. Since the number of diagonalizing gates in the circuit is $N$ and the gates are simulated independently, the classical computational complexity is $\mathcal{O}(N)$. Notably, many diagonalizing gates are identical so we can reuse the simulation results to reduce the classical computational overhead.

To evaluate the effectiveness of our approach, we conducted experiments using the Variational Quantum Eigensolver (VQE) algorithm to solve the MaxCut problem. We utilized the RealAmplitudes circuit as Ansatz for the VQE algorithm, which consists of alternating rotation Y gates and CNOT gates, e.g., Fig. 2. In our experiments, we set the alternating layer number of the rotation Y gates and CNOT gates to 2. The circuit parameters were fixed to the optimal values obtained using the ‘COBYLA’ optimizer on a noise-free simulator. The problem Hamiltonian for the MaxCut problem is defined as:

where $Z_{i}$ is the Pauli Z operator acting on qubit $i$. $E$ is the set of the graph edges in the MaxCut problem.

To assess the effectiveness of different error mitigation approaches, we calculate the absolute error of the expectation value for the problem Hamiltonian compared to the noise-free expectation value. This allows us to quantify the deviation of each error mitigation approach from the noise-free solution. To assess the gate complexity of different error mitigation approaches, we transpile the circuit into basis gates and count the number of CNOT gates. This provides a measure of the gate operations required by each error mitigation approach, offering a comparison of the circuit complexities.

Our experiments were conducted using the Qiskit framework v0.39.0. We utilized both a real quantum machine, a $27$-qubit ibm_hanoi, and a simulator, Qiskit Aer simulator, in our experiment. The simulator allows us to simulate quantum circuits under both noise-free and noisy conditions. We set the shot number to 10,000 for both the simulator and the real quantum machine.

Qiskit offers noise models that incorporate certain sources of noise from real quantum devices, and we use the noise model from real quantum device ibm_hanoi as our basic noise model. This basic noise model considers factors such as gate errors, gate time, $T_{1}$ and $T_{2}$ relaxation times, and readout errors for each qubit. The parameter of this noise model is based on the calibration data taken on September 27, 2023. The median CNOT error is $7.936e-3$, the median gate time is $346.667\,\text{n}\text{s}$, the median readout error is $1.200e-2$, the median T1 is $120.385\,\mu\text{s}$, and the median T2 is $138.652\,\mu\text{s}$.

In order to provide a more realistic evaluation of our approach, we incorporated additional noise sources in our experiments. Specifically, we modeled the ZZ crosstalk for CNOT gates and the readout crosstalk. By including these noise sources, we aimed to accurately capture the impact they have on the performance and effectiveness of different error mitigation approaches.

To model the ZZ crosstalk for CNOT gates, we adopted a method similar to the one described in [14]. This involved introducing additional $R_{ZZ}$ gates in the circuit whenever there were CNOT gates in the same layer and in adjacent positions. We set the angle $\theta$ of the inserted $R_{ZZ}$ gate to $-\pi/3.5$ based on the Ref. [14].

Readout crosstalk refers to the phenomenon where the measurement of one qubit can be affected by the state of neighboring qubits due to unintended coupling [6]. The basic noise model only considers the single-qubit readout errors which assumes that the readout noise acts independently on each individual qubit. To model the readout crosstalk, we introduced a 2-qubit readout error matrix for pairs of neighboring qubits. In our simulations, we set the readout error matrix as:

We conducted a comparison with the zero-noise extrapolation approach [2, 1] commonly employed for quantum error mitigation. The extrapolation technique aims to estimate the expectation value of an observable by extrapolating measurements obtained from circuits at different noise levels.

In the case of the extrapolation approach for virtual distillation, we followed a similar methodology as described in Ref. [10], where we scaled up the diagonalizing gates in the virtual distillation circuit for the extrapolation process. This scaling was specifically applied to the diagonalizing gates, as they are often subject to noise and can limit the precision of the virtual distillation approach in realistic scenarios.

In our experiments, we choose three scale factors 1, 3, and 5, for linear extrapolation.

The implementation of our approach and the comparison results with the extrapolation approach are publicly available at https://github.com/peiyi1/project_error_mitigation.

To evaluate the noise robustness of our circuit-cutting approach, we conducted a comparative analysis with different error mitigation approaches across various noise models. The results of these comparisons are presented in Table I and Table II, which display the simulation outcomes for the 4-qubit and 6-qubit VQE circuits, respectively.

To showcase the circuit optimization achieved through our approach, we compared the number of CNOT gates in different error mitigation techniques. Our focus on the CNOT gate count is motivated by the fact that 2-qubit gates typically introduce more gate noise in comparison to single-qubit gates and the CNOT gate is a widely used 2-qubit gate in superconducting systems. After applying the circuit-cutting technique, the CNOT gate count decreases compared with other mitigation approaches. By eliminating unnecessary gates, our approach reduces the overall gate count, thereby mitigating the impact of noise. This reduction in gate count leads to improved pairwise distributions, ultimately enhancing the accuracy of the output distributions in the presence of noise.

Table I and Table II also provide the expectation value and the absolute error obtained by different approaches under various noise models. The results demonstrate that as the complexity of the noise model increases, the error mitigation effectiveness of the virtual distillation approach diminishes. However, our circuit-cutting approach maintains a high level of error mitigation across different noise models. This achievement is attributed to the division of the circuit into smaller fragments, which greatly reduces the occurrence of CNOT gates executing at the same layer and in adjacent positions, thereby eliminating a significant portion of the ZZ crosstalk noise. Table I and Table II display the count of $R_{ZZ}$ gates when modeling the ZZ crosstalk for CNOT gates, indicating that our circuit-cutting approach introduces less ZZ crosstalk, whereas the original virtual distillation approach introduces a substantial amount of ZZ crosstalk. Furthermore, the tables also illustrate the efficient mitigation of readout crosstalk achieved by our circuit-cutting approach. This is achieved by reducing the number of measurement operations in the circuit. Conversely, the original virtual distillation circuit requires the preparation of at least two copies of the circuit, resulting in an amplification of readout crosstalk due to the increased number of qubits and measurement operations.

When comparing our circuit-cutting approach with the extrapolation approach, we observe that for smaller virtual distillation circuits, as illustrated in Table I, the extrapolation method indeed exhibits effective error mitigation. However, as shown in Table II, as the circuit size increases and the complexity of the noise model grows, the effectiveness of the extrapolation approach decreases. This is because the presence of multiple noise sources complicates the establishment of an accurate curve-fitting model for extrapolation. In contrast, our circuit-cutting approach consistently achieves error reduction even in the presence of more complex noise sources. This highlights the effectiveness and reliability of our approach in mitigating errors in quantum circuits.

To validate the practical applicability of our approach, we conducted experiments on a 27-qubit quantum device ibm_hanoi. The results for a 4-qubit and a 6-qubit VQE circuit are presented in Table III. Our circuit-cutting approach outperforms other error mitigation methods, highlighting the effectiveness of our approach in real-world quantum computing environments.

In addition to the experiments reported in Table III, we also performed experiments on a 10-qubit VQE circuit. However, despite applying circuit cutting, the resulting subcircuits still contained a substantial number of gates, leading to significant noise that prevented us from obtaining adequately mitigated pairwise distributions required for updating the noisy output distribution effectively. Consequently, we were unable to achieve satisfactory results. This further emphasizes the scalability and practical limitations of existing error mitigation approaches for larger quantum circuits.