Calibrated Single-Contact Voltage Sensor for High-Voltage Monitoring Applications

As smart grid technology evolves, utility companies continue to improve the monitoring capabilities in the grid to optimize the delivery of power to network loads. Sensors to measure voltage and power factor provide real-time feedback to a central monitoring station where dynamic changes to voltage and reactive power compensators can be made to reduce loss. Wireless monitoring of end user loads using smart meter technology is now common, and substation monitoring has always been available. However, real-time monitoring on distribution lines between substations and loads is not common. The distribution grid is extensive and distribution line monitoring requires a cost-effect sensor network strategy. Desirable features of a sensor unit include easy installation and a wireless link to back haul the remote measurement data to a central office.

The research work in this paper is motivated by the challenge of making accurate voltage measurements at intermediate points in the distribution grid. Power factor measurements require accurate phase measurements between voltage and current; however, the measurement can be made without knowing the exact magnitude of the voltage. Since voltage control [1, 2] in the grid is becoming increasingly important to reduce energy loss in the distribution of electricity, accurate measurements of the potential difference between conductors is required.

A key constraint in the work is to design a sensor that is easily deployable. The voltage sensor is designed to be integrated into a measurement unit that is clipped to a single wire with no contact to any other wires. Current measurements are easily made using a Rogowski coil that can be integrated into a clamp which attaches the sensor unit to the wire. On the other hand, an accurate voltage measurement from contact with a single wire is much more difficult. In this work, our goal was to design a voltage sensor capable of accurately determining the absolute potential difference between a pair of conductors while contacting only one of the conductors [3].

A review of the literature does not yield too many papers which investigate accurate single-contact voltage measurements for high-voltage transmission applications. In a Master’s thesis by van der Merwe [4], he presents a study and experiments for measuring the line potential in a three-phase system using capacitive coupling concepts. In his work, calibration of unknown capacitances is found from either numerical simulations for a specific wire geometry or experimentally by applying known potential differences between conductors to determine the value of the capacitance matrix. In our work, we seek to find in situ calibration methods where unknown capacitances must be estimated without exact knowledge of the wire geometry or without the need to apply test potentials between the wires. The constraints arise from the practical deployment of voltage sensing technology in a smart grid where installation must occur directly on live systems with arbitrary wire configurations.

Another three-phase voltage sensor configuration is described in Ref. [5]. The authors call the sensor a static induction type of voltage sensor and it consists of two plates near the conductor. In one design, the plates are arranged as a coaxial capacitor structure completely enclosing the conductor and in another design a semicircular conductor and a flat plate are used. The paper focuses on the evaluation of the phase errors detected by three sensors and the results assume the geometry and dielectric structure between the sensor and conductor are known.

In other work [6], a non-contact voltage sensor employing two capacitive sensing plates is described. The sensor is tested on an isolated conductor and requires a known reference voltage to be applied to the system to calibrate and find coefficients for a fitting function. A series of measurements with different displacements from the conductor are also made to estimate the potential of the conductor. In the design which we report on, neither calibration voltages nor changes in displacement are used for calibration.

Other work related to the measurement of potential using electric field sensors includes biomedical applications [7] and inspection of active current-carrying conductors in integrated circuits [8]. In these applications, the electric fields are very small and a significant challenge is amplifying and detecting small changes in potential difference. These methods focus on detecting relative changes in potential whereas our work focuses on methods to measure absolute potential differences without direct contact to both conductors.

In our design the principle concept is to construct a calibrated capacitive divider from which accurate measurements of voltage can be made. The divider consists of a controlled and known capacitance between the contacted line and a sensing plate and a second unknown stray capacitance from the sensing plate to the non-contacted line. Challenges in this design include developing calibration methods to estimate the unknown stray capacitance to the non-contacted line and optimizing the physical design of the sensor to maximize sensitivity. An experimental prototype has been constructed and evaluated in a high-voltage test bed. The results are encouraging and, assuming a calibration accuracy of 1%, absolute voltage measurements with an accuracy of $\pm$ 10% were made.

The remainder of the paper is organized as follows. Section II presents the voltage sensor design and the basic circuit model that is ultimately used to extract the potential difference between a pair of conductors from a single-contact measurement. In section III, the equivalent circuit model is analyzed and we identify two design criteria that must be satisfied in order to make reliable voltage measurements. The prototype sensor that was built and experimentally tested is discussed in section IV. Section V presents the key experimental results and section VI describes a simple modification of the design that makes the voltage sensor suitable for high-voltage applications without compromising its performance. Finally, the main conclusions are summarized in section VII.

This work is restricted to single-phase applications in which a pair of conductors, one neutral and one live, are suspended above earth ground. It is assumed that there is a good electrical connection between the neutral conductor and ground. Figure 1 shows two transmission line geometries that commonly exist in residential areas.

In both of these cases the single-phase sensor described in this paper could be used to actively monitor the absolute electric potential difference between the neutral and the high-voltage lines. In Fig. 1(a), a high-voltage conductor is suspended above a neutral conductor. In Fig. 1(b), a center-tapped transformer steps down the potential of the topmost high-voltage line and supplies a neutral conductor and two 120 Vrms split-phase (antiphase) conductors below. In the second case, a voltage sensor suspended from the high-voltage conductor will operate effectively as a single-phase sensor because, at the location of the high-voltage conductor, the net electric field due to the split-phase signals will almost exactly cancel. In addition, the magnitude of the electric fields due to the 120 Vrms lines will be small compared to that of the high-voltage line which typically operates between 6 and 7 kVrms.

A schematic diagram highlighting the fundamental design aspects of the single-point contact voltage sensor is shown in Fig. 2.

A capacitive sensor plate passes through, but is electrically isolated from, the main body of the sensor. The main body of the sensor is electrically and mechanically attached to conductor 2 which can be either the neutral or the live conductor. The body of the sensor, shown as the thick purple outline in the figure, is electrically conducting and provides electromagnetic shielding for the detection circuitry inside the enclosure. The shielding is crucial and ensures that the total capacitance between the sensor plate and the body is controlled and predictable. The total (net) capacitance between the sensor and body is called $C_{0}$. A second effective capacitance called $C_{p}$ is the net capacitance between the sensor plate and the non-contacted conductor, conductor 1. Together, $C_{0}$ and $C_{p}$ form a capacitive divider between the two conductors. As discussed in detail in the next section, the sensitivity of the voltage sensor is determined by the ratio of $C_{p}$ over $C_{0}$ and therefore significant consideration must be given to controlling these capacitances in the sensor design.

There can be multiple contributions to the net capacitances of $C_{p}$ and $C_{0}$ and the contributions depend whether conductor 2 is neutral or live. With reference to Fig. 2, consider the case where conductor 2 is the neutral conductor. In this case, $C_{p3}^{\prime}$ is shorted by the neutral-earth connection, $C_{p2}^{\prime}$ is in parallel with $C_{0}^{\prime}$, and $C_{p1}^{\prime}$ is the capacitance between the two conductors which has no effect on the voltage divider formed by $C_{p}$ and $C_{0}$. Therefore, in this configuration, $C_{p}=C_{p}^{\prime}$ and $C_{0}=C_{0}^{\prime}+C_{p2}^{\prime}$. On the other hand, if conductor 2 is the live conductor, $C_{p}=C_{p}^{\prime}+C_{p2}^{\prime}$ and $C_{0}=C_{0}^{\prime}$. In this case, $C_{p1}^{\prime}$ is short-circuited by the neutral-earth connection and $C_{p3}^{\prime}$ is the effective capacitance between the two conductors which has no effect on the capacitive voltage divider. As a result, the conductor that the sensor is suspended from determines whether $C_{p}$ or $C_{0}$ is increased by an amount $C_{p2}^{\prime}$. Finally, housed inside the body of the sensor is a tunable capacitor bank placed in parallel with $C_{0}$. The voltage $V_{m}$ is measured across $C_{0}$ in parallel with the net capacitance of the capacitor bank. The voltage measurement is buffered and then connected to an analog-to-digital (A/D) converter, standard rms ac voltmeter, or oscilloscope. The buffer must have very high input impedance and is essential to prevent loading the capacitive divider network.

Outside of residential areas, three-phase transmission lines are commonplace. This geometry is complicated by the fact that, in addition to the capacitance to earth ground, one must now consider the stray capacitances between the sensor and the two conductors that it is not in contact with. Three-phase applications will be a topic of future investigations.

The equivalent circuit model of the single-contact voltage sensor is shown in Fig. 3.

In general, the input impedance of the op-amp must be taken into account when determining the final voltage $V_{m}$ measured at the op-amp output. With the sensor attached to the neutral conductor, the voltage at the op-amp output is given by:

In these equations, $C_{b}=C_{1}+C_{2}+\dots$ is the net bank capacitance and:

where $C_{0}$ is the intrinsic capacitance between the sensor plate and the housing (defined earlier in section II), $C_{\mathrm{op}}$ is the effective input capacitance of the op-amp, and $C_{s}$ is any additional stray capacitance from the layout of the circuit inside the enclosure. We note that if the sensor is suspended from the live conductor, the expression for $V_{m}$ given in Eqs. (1) and (2) will change only by an overall negative sign.

The frequency response of $V_{m}$ is that of a high-pass filter with a corner frequency of $f_{c}=\left[2\pi R_{\mathrm{op}}\left(C_{0}^{\prime\prime}+C_{b}+C_{p}\right)\right]^{-1}$. The op-amp used as a buffer is an Analog Devices AD549L which has a nominal input resistance $R_{\mathrm{op}}$ of $10^{15}~{}\Omega$ in parallel with a nominal input capacitance $C_{\mathrm{op}}$ of $0.8$ pF [9]. Provided that the voltage sensor is operated at frequencies much greater than $f_{c}$, $R_{\mathrm{op}}$ makes negligible contribution to $V_{m}$. Under these conditions, Eqs. (1) and (2) simplify to:

such that $V_{m}$ and $V_{L}$ are in phase and their relative amplitudes are determined by a ratio of capacitances. Section V will show that, for typical values of $C_{0}^{\prime\prime}$, $C_{p}$, and $C_{b}$, $f_{c}$ is expected to be less than 1 mHz. The high-frequency cut-off of the voltage sensor is set by the gain-bandwidth product of the op-amp which is 1 MHz. As a result, the voltage sensor is well suited to transmission line applications where the fundamental frequency (50 or 60 Hz) and harmonics fall well within the bandwidth of the design.

Equation (4) also clearly shows that $V_{m}/V_{L}$ is greatest when $C_{p}$ is large and $C_{0}^{\prime\prime}$ is small and this explains why the voltage sensor sensitivity is enhanced when it is suspended from the live conductor. Note that if one is only interested in relative voltage measurements, then $C_{b}$ can be set to any arbitrary value and the precise values of $C_{0}^{\prime\prime}$ and $C_{p}$ need not be known. Furthermore, this sensor will reliably reproduce voltage waveforms and, if it is used in combination with a Rogowski coil, the power factor of the transmission line can be measured.

In practice, absolute values of $V_{L}$ are extracted from measurements of $V_{m}$ as a function of $C_{b}$ and, although Eq. (4) is very simple, there are important subtleties that must be considered in order to obtain reliable results. First, if $V_{L}$, $C_{p}$, and $C_{0}^{\prime\prime}$ are all treated as unknowns, then the desired line voltage $V_{L}$ cannot be uniquely determined from measurements of $V_{m}$ as a function of $C_{b}$. Any set of parameters $\{V_{L},C_{p},C_{0}^{\prime\prime}\}$ that maintains the correct values of the product $V_{L}C_{p}$ and the sum $C_{0}^{\prime\prime}+C_{p}$ will produce identical least-squares fits of Eq. (4) to a set of $V_{m}$ versus $C_{b}$ measurements. To extract absolute values of $V_{L}$ requires that either $C_{0}^{\prime\prime}$ or $C_{p}$ be known. It is far easier to obtain reliable estimates of $C_{0}^{\prime\prime}$ via a factory calibration because its value will be larger than $C_{p}$ and it will be less dependent on the geometry of the conductors. (See section V.)

The second crucial requirement for accurate voltage measurements is that $C_{p}$ must be large enough to contribute significantly to the denominator of Eq. (4) for at least some of the $C_{b}$ values. If this condition is not satisfied, then $V_{m}\approx V_{L}C_{p}/\left(C_{0}^{\prime\prime}+C_{b}\right)$ and one is only able to determine the product $V_{L}C_{p}$. Requiring $C_{0}^{\prime\prime}$ to be on the same order of $C_{p}$ presents a major design challenge because, as will be shown in section V, $C_{p}$ can be 1 pF or less for typical sensor plate/transmission line geometries. Therefore, it is critical to design a capacitive sensor that maximizes the ratio $C_{p}/(C_{0}+C_{p})$ and to use a circuit layout that minimizes stray capacitance contributions to $C_{0}^{\prime\prime}$.

Figure 4 shows a photograph of the prototype voltage sensor that was constructed and experimentally tested.

The main body of the sensor is made of aluminum and anchored to the neutral conductor of a short section of transmission line constructed from half-inch diameter threaded steel rod mounted in a wooden frame. A rigid conducting rod that passes through, but is electrically isolated from the sensor body, supports the copper capacitive sensor plate.

Several capacitive sensor designs were explored both experimentally and via numerical simulations before settling on a plate suspended from a thin rod. In the limit that the live conductor is very far from the capacitive sensor, the self-capacitance of the sensor is expected to determine the value of $C_{p}$. For example, a spherical sensor that has the same radius as the disk would have a self-capacitance that is larger by a factor of $\pi/2$. However, as will be shown in the next section, this modest gain in $C_{p}$ is offset by an even larger gain in $C_{0}$ resulting in an overall decrease in the ratio $C_{p}/(C_{0}+C_{p})$. The $C_{p}/(C_{0}+C_{p})$ ratio is maximized by the thin disk sensor simply because this geometry minimizes $C_{0}$ by keeping the sensor plate as far as possible from the main body of the sensor.

The sensor electronics are isolated from stray fields by enclosing them inside a conducting box that serves as the main body of the voltage sensor. The circuit layout is shown in Fig. 5.

The op-amp circuit is powered by $\pm 18$ V supplies using 9 V batteries in series and the op-amp output is measured by a Fluke 115 digital multimeter or, if one wishes to observe the waveforms, an oscilloscope. In a commercial application, the op-amp output would be captured by an A/D converter and then wirelessly transmitted to a remote receiver. The A/D converter can sample the op-amp output at a rate much greater than 60 Hz such that the transmitted signal reliably reproduces a scaled version of the true waveform of the transmission line signal.

The most important consideration for the buffer and capacitor bank circuit is layout. An optimized layout that (a) minimizes stray capacitance $C_{s}$ between the signal line originating from the sensor plate and the main body of the sensor and (b) preserves the very high input resistance of the op-amp must be used. Many useful guidelines are given in Refs. [9] and [10]. First, we have avoided using circuit boards which can add both unwanted capacitance and a finite resistance through the dielectric insulator. As shown in the Fig. 5, all electrical connections to the op-amp have been made by soldering leads directly to the op-amp pins. Additionally, connections between the sensor plate and the buffer input are shielded with coaxial cables whose outer conductors are tied to the op-amp output. This eliminates leakage currents through the coaxial cable dielectric, guards against outside interference, and eliminates stray capacitance between the op-amp input signal line and the surrounding neutral enclosure of the voltage sensor [10]. Also visible in Fig. 5, are the receptacles for the bank capacitors. The left-hand side receptacle is tied to the sensor enclosure and the right-hand side to the buffer input. A copper foil shield is held at the output potential of the buffer, once again, to minimize unwanted stray contributions to $C_{0}^{\prime\prime}$.

To get an estimate of the combined contributions of $C_{\mathrm{op}}$ and the stray capacitance $C_{s}$ to $C_{0}^{\prime\prime}$, the sensor disk and its support rod were removed and the bank capacitance was set to zero. A known calibration capacitor $C_{\mathrm{cal}}$ was placed between the buffer input and the far (live) conductor. A calibration voltage $V_{\mathrm{cal}}$ was then applied across the neutral and live conductors. Under these conditions, the op-amp output is:

Rearranging this expression gives the desired result: $C_{s}+C_{\mathrm{op}}=C_{\mathrm{cal}}\left(V_{\mathrm{cal}}/V_{m}-1\right)$. Using this method, $C_{s}+C_{\mathrm{op}}$ was measured to be $5.97\pm 0.06$ pF where the uncertainty is associated with the 1% tolerance of the silver mica calibration capacitor, $C_{\mathrm{cal}}$.

We note that in the prototype sensor presented here, the bank capacitance is changed manually by adding and removing individual silver mica capacitors. In a practical sensor, the bank capacitance values would be changed remotely perhaps using MOSFET or MEMS switches in series with each individual bank capacitor.

In this section, simulation and experimental results are presented to evaluate the performance of the single-point contact voltage sensor. Various capacitive sensor designs were evaluated to determine the sensing plate geometry that maximizes the sensitivity of the sensor. Next, the dependencies of $C_{p}$ and $C_{0}$ on the spacing between conductors and the conductor height above the ground plane were investigated using both experimental measurements and simulations. The sensor output voltage $V_{m}$ was also tested with the transmission line terminated with different loads (open, resistive, capacitive, and inductive) and shown to be independent of the line current. The bandwidth of the sensor was then experimentally measured and, as expected, shown to be flat over the frequency range of interest. Finally, and most importantly, the prototype sensor was used to extract the line voltage $V_{L}$ from measurements of $V_{m}$ as a function of the bank capacitance $C_{b}$. Our measurements show that the voltage sensor operates reliably over a wide range of line voltages.

Up to this point, all of the data that has been presented has been limited to line voltages of 100 Vrms or less. Since the main motivation for designing the sensor is to measure high ac voltages, the design needs to be scaled and verified under high-voltage conditions.

The prototype sensor described so far uses a capacitive divider between the two conductors and the measured voltage at the output of the buffer is given by $V_{m}=V_{L}C_{p}\left(C_{0}^{\prime\prime}+C_{p}\right)^{-1}\approx V_{L}/10$ when $C_{b}=0$. Because the buffer is powered by a low-voltage supply ($\pm 18$ V), its output saturates for line voltages greater than 120 Vrms. The voltage division across the capacitor divider is determined by $C_{p}$ and $C_{0}^{\prime\prime}$ and, for reasons given earlier, it is important to have a low ratio to maintain high accuracy. On the other hand, the low ratio means the voltage division factor is small and consequently a high voltage is measured at the input of the op-amp.

As a way to maintain accuracy and increase the voltage division ratio, Fig. 12 shows a design modification that enables the sensor to be scaled to high-voltage applications. A two-step voltage divider is set-up using two additional capacitors, $C_{d1}$ and $C_{d2}$. Neglecting the input resistance of the op-amp, the measured output is given by:

where $C_{s}$ is the stray capacitance associated with the layout of the circuit and is not shown in Fig. 12. In high-voltage applications, the condition $C_{d2}\gg C_{d1}$ is required to significantly step the voltage down, therefore:

where $C_{0,\mathrm{HV}}^{\prime\prime}=C_{0}+C_{s}+C_{d1}$.

If $C_{d1}$ is selected to be of the same order as $C_{\mathrm{op}}\approx 0.8$ pF, then $C_{0,\mathrm{HV}}^{\prime\prime}\approx C_{0}^{\prime\prime}$. Under this condition, $V_{m}/V_{L}$ is reduced by an additional factor of $C_{d2}/C_{d1}$ without significantly altering either the accuracy or bandwidth of the sensor. The ratio $C_{d2}/C_{d1}$ can be made arbitrarily large and the primary limitation becomes the dielectric breakdown voltage of the capacitors.

The two-stage voltage divider shown in Fig. 12 was implemented in the prototype sensor to verify the circuit. In the circuit, nominal capacitances of $C_{d1}=0.5$ pF and $C_{d2}=130$ pF were used. A step-up transformer with a turns ratio of 62.5:1 was used with a 0–140 Vrms variac feeding the primary winding. With this configuration, the line voltage could be increased up to 7.5 kVrms. A high-voltage probe (Tektronix P6015A) was used to measure the exact line voltage. The picture shown earlier in Fig. 5 includes the two-stage voltage divider and the 62.5-times step-up transformer. Figure 13 shows the measured $V_{m}$ data plotted as a function of $V_{L}$ up to 7.5 kVrms with the voltage sensor suspended from the neutral conductor and suspended from the live conductor.

As expected, both data sets are very linear ($R^{2}=1.00$). These datasets also experimentally confirm that suspending the voltage sensor from the live conductor results in an enhanced measurement sensitivity (increased slope).

A sensor capable of accurately measuring the ac voltage across a pair of conductors with a single contact to one conductor has been described and evaluated experimentally. The sensor uses the stray capacitance $C_{p}$ from a sensing plate to the non-contacted conductor to create a capacitive voltage divider that can be used to measure the line voltage. A straightforward factory calibration to determine the net capacitance $C_{0}^{\prime\prime}$ from the sensing plate back to the main body of the sensor is required to extract the absolute line voltage. A set of measurements with calibrated bank capacitors are then made and a nonlinear constrained optimizer is used to find a set of best-fit parameters, which includes an estimate of the unknown line voltage. With the prototype sensor suspended from the neutral conductor, if $C_{0}^{\prime\prime}$ is known to within 1% of its true value, then the absolute line voltage was determined to within 10% of its true value. Moving the sensor to the live conductor, optimizing the circuit layout to minimize shunt capacitances to the op-amp input, and refined factory calibrations of $C_{0}^{\prime\prime}$ are all practical methods that can be used to improve the accuracy of the estimated line voltage.

Other important contributions of this work include an investigation into the best shape of the capacitor sensing plate. Four different designs were evaluated using numerical simulations and a flat disk sensor was found to be the best design. Simulation results were used to explore the difference between mounting the sensor on the neutral or live (high-voltage) line. The simulation results, supporting theory, and experimental measurements all conclude that better sensitivity and accuracy can be obtained by contacting the high-voltage conductor. Finally, a two-stage capacitor divider was tested to increase the operating voltage of the sensor up to 7.5 kVrms. Future work will include testing the design up to much higher line voltages and investigating three-phase applications.

The authors gratefully acknowledge the support of Awesense Wireless, NSERC, and CMC Microsystems.