A Cost & Performance-Efficient Field-Programmable Pin-Constrained
Digital Microfluidic Biochip

Microfluidic biochips are modern revolutionary devices enabling a new paradigm in performing fluidic bio-chemistry and laboratory manipulations never existed before; providing various ranges of applications among which are DNA multiplexed Polymerase Chain Reaction (PCR) [1], in-vitro diagnostics [2] and protein crystallization [3] and DNA computing [6].

The conventional bio-chemistry operations are mostly performed/controlled by human intervention. On the other hand traditional methods of accomplishing laboratory operations require considerable amounts of experiment materials and reagents; which might be costly with experimental testing of new drugs. Yet, laboratory equipment consume large amounts of space thus a room might be dedicated to accommodation of the aforementioned equipment. Also, automated robotic laboratory equipment cost much more than affordable to an end-user person.

In order to address aforesaid issues the microfluidic biochips were developed; these chips are mainly aimed at three crucial factors of automation, cost-affordability and miniaturization.

Microfluidic biochips are accompanied by a microcontroller used for programming the chip to perform wide ranges of laboratory procedures along with the bio-chemistry operations without any human interventions thus realizing automation factor. These chips operate on the basis of manipulating negligible amount of fluids thus providing significant cost-affordability in terms of experiment materials and reagent consumption. Yet, these chips are manufactured at scales resulting in much smaller area consumption as compared to the conventional circuits [10] and laboratory equipment; this implies the miniaturization factor inherent in the microfluidic biochips.

A typical digital microfluidic biochip consists of two plates; the bottom plate is consisted of an array of equal-size electrodes while the top plate spans the bottom plate and acts as the ground electrode. Figure 1 illustrates the top and cross-sectional view of a DMFB.

The electrodes forming the array of electrodes are connected to the pins of the microcontroller; the microcontroller can be programmed in order to turn on/off the electrodes such that the intended bio-assay is realized. Droplets are sandwiched in between the top and bottom plates; at the bottom plate there are electrodes on which droplets would be actuated. Considering the structure of the bottom plate on top of electrodes there is a dielectric layer; additionally a hydrophobic layer is placed on top of the dielectric layer. The hydrophobic layer is used for facilitating movement of droplets on the surface of the DMFB. In order to ease movement of droplets further the space between the top and bottom plates is filled with some filler fluid, typically silicon oil, which allows for better movement of droplets on the array of electrodes.

This paper presents a low-cost yet general-purpose digital microfluidic biochip; the proposed design is considerably smaller than the previous state-of-art designs which in turn results in significant improvements in terms of total number of electrodes and control pins used for driving electrodes, along with cheaper fabrication costs; also the proposed improvements in the hardware design results in shorter droplet routing times thus improving the overall bio-assay completion times.

The rest of the paper is organized as follows: section II is devoted to review of underlying technologies and the design flow associated with digital microfluidic biochips. Section III provides literature review of the previous works on DMFB designs. Section IV initially reviews the original general-purpose field-programmable DMFB design on the basis of which the enhanced design proposed in this study is established. Section V is devoted to presentation of simulation results in comparison with other previous notable designs. Eventually, section VI concludes the paper.

This section initially reviews the fundamental technologies related with digital microfluidic biochips, then proceeding to the DMFB design flow.

This section reviews major previous works addressing various recent DMFB architectures and algorithms. Over the course of past few years there have been numerous studies on DMFBs.

Xu et al. [13] proposed a broadcast-addressing DMFB; their proposed design encompasses a multi-function pin-constrained DMFB capable of executing a predefined set of bioassays. Luo et al. [18] proposed a pin-constrained pin-mapping scheme allowing concurrent movement of two droplets on the DMFB; their proposed design is targeted towards performing a predefined set of bioassays.

Keszocze et al. [19] proposed a DMFB synthesis based on their general and exact routing methodology. Their proposed design results in significantly low number of control pins. While demanding small number of control pins their proposed design is solely applicable to small to mid-size bio-assays (e.g. PCR, In-vitro diagnostics); this is because the computational time for large complex bio-assays such a protein-split would be prohibitively large.

Wille et al. [20] proposed a one-pass synthesis scheme with much faster computation times compared with [19]; faster computation times allow for performing large bio-assays such as protein-split not computationally feasible in [19]. Although much more efficient in terms of computation times the runtime of the produced solutions is approximate and considerably variable among different runs.

Abdoli et al. [8] [24] proposed a field-programmable pin-constrained design; their proposed design is considerably smaller than previous pin-constrained designs also yielding reduced overall number of electrodes and controlling pins. This paper enhances the DMFB design in [8]. Also, Abdoli et al. [9] proposed their architecture with a cellular structure providing a regular expandable structure; their proposed structure is inspired by the widely popular FPGA devices.

Grissom et al. [11] proposed a field-programmable pin-constrained design aimed at general-purpose bioassay execution. Also, Grissom et al. [12] proposed their enhanced low-cost pin-constrained DMFB design so that requiring less number of metal-layers towards wire-routing of the DMFB; thus, yielding significantly reduced overall manufacturing costs.

The architecture layout and pin-mapping scheme have a great impact on the overall manufacturing costs of the design. The field-programmable pin-constrained designs [8] [9] [11] [12] employ a layout and scheme such that to provide general-purpose bioassay execution along with reduced pin-count so that the overall manufacturing cost of the DMFB is significantly reduced. Given the considerable number of electrodes allocated to droplet routing paths then efficient addressing of routing paths is of significant importance in terms of pin-count and overall DMFB manufacturing costs.

A typical general-purpose pin-constrained DMFB design consists of mixing modules, storage/split/detection (SSD) modules and droplet routing paths towards movement of droplets; simulation pin-mapping scheme of the proposed DMFB design is depicted in Figure 6.

Looking at Figure 6 there are 4 mixing modules and 8 SSD modules; also there are two vertical routing paths at the left and right of the design; used towards inputting/outputting droplets into/out of I/O reservoirs. Also, there are two horizontal routing paths at the top and bottom of the design; which allow for inputting/outputting droplets into/out of mixing and SSD modules. Mixing modules are used for merging and mixing of droplets; while SSD modules are used for storing, splitting and detection of droplets.

This paper enhances the field-programmable pin-constrained DMFB design originally proposed in [8]. The original design offered numerous advantages compared with previous designs among which are smaller array dimensions, lower number of electrodes and also reduced number of controlling pins. Lower dimensions results in significantly lower droplet routing times such that the total bioassay execution times are considerably reduced.

The overall manufacturing cost of a typical DMFB is affected by various factors among which are:

• •

  Dimensions of array of electrodes

• •

  Number of metal-layers

• •

  Pin-count

In this section it is attempted to provide detailed cost information on manufacturing costs of the proposed DMFB design while at the same time comparing with the state-of-art designs already available; this helps to show how the proposed DMFB design retains original capabilities while at the same time remaining competitive with the state-of-art DMFB designs [8] [12].

The original FPPC DMFB design [11] proposed a field-programmable pin-constrained DMFB design capable general-purpose bioassay execution. The Enhanced FPPC DMFB [12] proposed by Grissom et al., is a general-purpose DMFB design requiring a one/two metal-layer(s) towards wire-routing; the number of metal-layers in [12] varies given the orthogonal capacity parameter applied during the wire-routing stage. In case of orthogonal capacity equal to 2 the wire-routing stage yields a two metal-layers wire-routing. Figure 10 illustrates the two metal-layers wire-routing of their proposed DMFB design.

Table I shows a summary on characteristics and wire-routing details of various general-purpose DMFB designs. The column ‘Name’ denotes name of the DMFB design; while column ‘WR Alg.’ refers to the wire-routing algorithm applied to the DMFB design. The column ‘Array Dim.’, along with sub-columns ‘X’ and ‘Y’ show array dimensions of the DMFB design. Columns ‘# Elec’ and ‘# Pin’ denote number of electrodes and control pins in each design, respectively. The column ‘# Metal-Layers per Orthogonal Capacity’ represents number of metal-layers used towards wire-routing given different orthogonal capacities.

Considering results of Table I it is seen that the original FPPC [11] design yields 5 metal-layers solution with orthogonal capacity of 2; on the other hand the enhanced FPPC [12] yield 2 metal-layers solution for the orthogonal capacity of 2. Increasing the orthogonal capacity to 3 achieves 1 metal-layer solution for the enhanced FPPC.

The remaining of this section discusses detailed cost analysis of the wire-routing stage; for the sake of fairness and similarity solely, the Enhanced FPPC [12] and the proposed design will be addressed.

As stated in earlier the proposed DMFB design requires 3 metal-layers wire-routing; this is obviously more than the two metal-layers wire-routing solution for Enhanced FFPC DMFB design. However, given the larger dimensions of the Enhanced FPPC DMFB design for accommodating equal number of resources (mixing/SSD modules) compared with the proposed DMFB design in this work and also higher pin-count compared with the present work the overall manufacturing cost of the proposed DMFB design would be competitive with the Enhanced FPPC DMFB design.

To our best knowledge authors in [12] for the first time ever attempted to provide detailed information on overall manufacturing costs of DMFB designs. Considering the overall cost of a typical DMFB design the first key element is the number of metal-layers used for wire-routing. The second and third key elements are architecture dimensions and pin-count number, respectively. Larger architecture dimensions mean higher PCB costs; on the other hand higher number of pin-count requires more equipment for driving those extra pins which again costs extra charges to the overall manufacturing costs of the DMFB.

The authors in [12] used Advanced Circuits’ online instant quote feature [25] to obtain estimations on the cost of PCB according to dimensions of the architecture. Also, according to [12] it is assumed that DMFBs are driven by an Atmega 1284 microcontroller with 32 general-purpose I/Os (GPIOs) [26]. In case a DMFB design requires more than 32 pins then additional circuitry is needed which accomplished by daisy-chaining arbitrary number of Fairchild 74VHC595MTC 8-bit shift registers [27]; quantities of 2500 of the aforementioned shift register can be purchase for $0.14 per unit from Mouser [28]. The following equation obtained from [12] shows the number of shift registers required for driving any DMFB designs.

Also, according to [12] the overall manufacturing cost of a typical DMFB is obtained using the following equation

According to above equation wire-routing cost of a typical DMFB is directly affected by the cost of PCB plus the cost of additional circuitry in the form of shift registers used for driving pins; additional circuitry is needed in case number of pins is higher than the number to be accommodated by the microcontroller so requiring shift registers. According to [25], using larger feature sizes tends to reduce the PCB cost. Equation 3 shows the elements effective on the PCB cost.

Figure 11 shows the DMFB layout for PCB size estimation. As can be seen the array of electrodes is surrounded by a 0.5 inch perimeter of empty space; also the PCB width is extended to accommodate as many shift registers as necessary [12].

Table II defines parameters used in Figure 11. As illustrated in the figure parameters width_PCB and height_PCB denote width and height of the PCB. Also, parameters width_A and height_A represent width and height of the array of electrodes. The parameters width_SR and height_SR correspond to width and height of the shift registers; additionally, parameter width_SRS represents the spacing between shift registers.

Equations 4 and 5 calculate the PCB dimensions; also, the PCB space devoted to accommodation of shift registers is calculated through Equation 6. According to [12] shift registers are stacked vertically and in case necessary the width of PCB is increased to accommodate another column of shift registers.

Table III indicates PCB price estimates for varying number of layers and parameters. The figures have been obtained from Advanced Circuits’ online quote [25]; the online quote system allows for specifying various parameters. For the sake of this study solely parameters of width and height of PCB, trace/size space, via size and number of layers were specified; leaving other parameters at their default values.

Looking at the figures provided in Table III PCB price estimates are provided for three electrode sizes of 1, 2 and 2.54 mm; within each category PCB price estimates are provided for different values of trace/size spacing, via size and number of layers. In every category of electrode sizes a single configuration with the most affordable pricing is highlighted in black.

Table IV indicates the cost estimates of various sizes DMFB designs for the proposed GFPC and Enhanced FPPC architectures. The column ‘DMFB Details’ presents various information on the specifications of the design; the sub-column DMFB Name denotes name of DMFB design. The sub-columns # Pins and # SR represent number of control pins and shift registers required for driving pins of the DMFB design, respectively. Sub-column Adjusted PCB Dims represents the total size of PCB for accommodating the array of electrodes in addition to the number of shift registers (if any). The sub-column # Layers shows the number of metal-layers used for wire-routing. The column Cost($) represents the cost estimation of the DMFB; the sub-columns Board and SR denote the cost estimation for the PCB (total size for accommodating the array of electrodes and any shift registers) and shift registers circuitry, respectively. The sub-column Total shows the sum of two sub-columns Board and SR, giving the total cost towards wire-routing of the DMFB.

Interpreting results obtained in Table IV is seen that in case of 4 module variation of enhanced FPPC and the proposed design the enhanced FPPC design provides lower overall PCB costs given the lower layer-count; though, as the designs enlarge the proposed design would require smaller area and lower pin-count. Thus, in case the Enhanced FPPC design with 8 mixing modules and the proposed design with 6 modules the higher pin-count in the Enhanced FPPC design necessitates 5 shift registers for driving the controlling pins not to be accommodated by the microcontroller directly. Yet, in case of the proposed design the lower pin-count leads to lower number of shift registers thus incurring lower costs in terms of shift registers. The lower cost of shift register in case of the proposed design yields an overall cost lower than the enhanced FPPC design.

The performance simulation results are conducted using the UCR Static Synthesis Simulator [7], an open-source DMFB framework, provided by the researchers at the University of California Riverside.

Table V details performance simulation evaluation of conducting various bio-assays on the DMFBs. The bio-assays involve PCR (Polymerase Chain Reaction), In-vitro diagnostics (with variable number of samples and reagents), and Protein split; all of the bio-assays are available within the UCR SSS framework [7]. The column ‘Name’ illustrates the name and type of the bio-assay. Column ‘Scheduling’ shows the scheduling time of the bio-assay; while column ‘Routing’ is devoted to the droplet routing times of the bio-assays. Column ‘Total’ is computed as the sum of the values of ‘Scheduling’ and ‘Routing’ columns which stands for the total time taken to perform the bio-assay.

Looking at the figures provided in Table V it is seen that the scheduling times of the enhanced FPPC is superior in case of In-vitro_2 to In-vitro_5 bioassays; thereby outperforming the proposed design by 3 percent. Next, considering droplet routing times it is noted that the proposed design performs remarkably lower droplet routing times compared with the enhanced FPPC design; this is due to architecture of the proposed design and also smaller size of the architecture compared with the enhanced FPPC design.

In this paper an enhanced general-purpose field-programmable pin-constrained DMFB design was proposed. The enhanced design was aimed at reducing the manufacturing costs while retaining and improving the overall performance. According to cost analysis and performance simulation results the proposed design demanded lower PCB costs and also at the same time provided faster total bioassay execution times in average.